DGT ISO 2.5KV RS422/RS485 16SOIC
| Part Number | ADM2483BRW |
| Date Code | 2150 |
| Quantity Available | 20390 pcs |
| Manufacturer | Analog Devices Inc. |
| Lead Time | Ship within 24 hours |
| QTY | 2000 |
| Datasheet | ADM2483.pdf |
| Minimum Quantity | More than 50pcs |
| Distributor | SingSun |
| RoHS Status | Lead free / RoHS Compliant |
| Ship From | Hong Kong |
| Shipment Way | EMS/SF/DHL/TNT/UPS/FedEx |
| Country of Assembly | KOREA |
| Country of Diffusion | TAIWAN,CHINA |
| Lot Number | KS11537.75 |
| MSL | 1 |
| Packaging | Tube |
| Series | iCoupler® |
| Base Product Number | ADM2483 |
| Technology | Magnetic Coupling |
| Type | RS422, RS485 |
| Isolated Power | No |
| Number of Channels | 3 |
| Inputs - Side 1/Side 2 | 2/1 |
| Channel Type | Bidirectional |
| Voltage - Isolation | 2500Vrms |
| Common Mode Transient Immunity (Min) | 25kV/µs |
| Data Rate | 500kbps |
| Propagation Delay tpLH / tpHL (Max) | - |
| Pulse Width Distortion (Max) | - |
| Rise / Fall Time (Typ) | 600ns, 600ns (Max) |
| Voltage - Supply | 3V ~ 5V |
| Operating Temperature | -40°C ~ 85°C |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.295", 7.50mm Width) |
| Supplier Device Package | 16-SOIC |
The ADM2483BRW differential bus transceiver is an integrated, galvanically isolated component designed for bidirectional data communication on balanced, multipoint bus transmission lines. It complies with ANSI EIA/TIA-485-A and ISO 8482: 1987(E). Using the iCoupler technology from Analog Devices, Inc., the ADM2483 combines a 3-channel isolator, a three-state differential line driver, and a differential input receiver into a single package. The logic side of the device is powered with either a 5 V or 3 V supply, and the bus side uses a 5 V supply only.
The ADM2483BRW is slew-limited to reduce reflections with improperly terminated transmission lines. The controlled slew rate limits the data rate to 500 kbps. The device’s input impedance is 96 kΩ, allowing up to 256 transceivers on the bus. Its driver has an active-high enable feature. The driver differential outputs and receiver differential inputs are connected internally to form a differential input/output (I/O) port.
When the driver is disabled or when VDD1 or VDD2 = 0 V, this imposes minimal loading on the bus. An active-high receiver disable feature, which causes the receive output to enter a high impedance state, is provided as well. The receiver inputs have a true fail-safe feature that ensures a logic-high receiver output level when the inputs are open or shorted. This guarantees that the receiver outputs are in a known state before communication begins and at the point when communication ends.
Current limiting and thermal shutdown features protect against output short circuits and bus contention situations that might cause excessive power dissipation. The part is fully specified over the industrial temperature range and is available in a 16-lead, wide body SOIC package.
