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AD9763ASTZ

AD9763ASTZ

IC DAC 10BIT DUAL 125MSPS 48LQFP

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Shenzhen
4423 pcs
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5734 pcs
Hong Kong
7318 pcs
United States
9175 pcs
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Specifications of AD9763ASTZ

Part Number AD9763ASTZ
Date Code 2302
Quantity Available 26650 pcs
Manufacturer Analog Devices Inc.
Lead Time Ship within 24 hours
QTY 2500
Datasheet AD9763.pdf
Minimum Quantity More than 50pcs
Distributor SingSun
RoHS Status Lead free / RoHS Compliant
Ship From Hong Kong
Shipment Way EMS/SF/DHL/TNT/UPS/FedEx
Country of Assembly TAIWAN
Country of Diffusion KOREA
Lot Number NT84776.22
MSL 1
Packaging Tray
Base Product Number AD9763
Series TxDAC+
Number of Bits 10
Number of D/A Converters 2
Settling Time 35ns (Typ)
Output Type Current - Unbuffered
Differential Output Yes
Data Interface Parallel
Reference Type External, Internal
Voltage - Supply, Analog 3 V ~ 5.5 V
Voltage - Supply, Digital 2.7 V ~ 5.5 V
INL/DNL (LSB) ±0.1, ±0.07
Architecture Current Source
Operating Temperature -40°C ~ 85°C
Package / Case 48-LQFP
Supplier Device Package 48-LQFP (7x7)
Mounting Type Surface Mount

AD9763ASTZ Features

  • 10-bit dual transmit digital-to-analog converters (DACs)
  • 125 MSPS update rate
  • Excellent SFDR to Nyquist @ 5 MHz output: 75 dBc
  • Excellent gain and offset matching: 0.1%
  • Fully independent or single-resistor gain control
  • Dual-port or interleaved data
  • On-chip 1.2 V reference
  • 5 V or 3.3 V operation
  • Power dissipation: 380 mW @ 5 V
  • Power-down mode: 50 mW @ 5 V
  • 48-lead LQFP

AD9763ASTZ Applications

  • Communications
  • Base stations
  • Digital synthesis
  • Quadrature modulation
  • 3D ultrasound

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AD9763ASTZ Description

The AD9763 are dual-port, high speed, 2-channel, 10-bit CMOS DACs. Each part integrates two high quality TxDAC+® cores, a voltage reference, and digital interface circuitry into a small 48-lead LQFP. The AD9763 offer exceptional ac and dc performance while supporting update rates of up to 125 MSPS.

The AD9763 have been optimized for processing I and Q data in communications applications. The digital interface consists of two double-buffered latches as well as control logic. Separate write inputs allow data to be written to the two DAC ports independent of one another. Separate clocks control the update rate of the DACs.

A mode control pin allows the AD9763 to interface to two separate data ports, or to a single interleaved high speed data port. In interleaving mode, the input data stream is demuxed into its original I and Q data and then latched. The I and Q data is then converted by the two DACs and updated at half the input data rate.

The GAINCTRL pin allows two modes for setting the full-scale current (IOUTFS) of the two DACs. IOUTFS for each DAC can be set independently using two external resistors, or IOUTFS for both DACs can be set by using a single external resistor. See the Gain Control Mode section for important date code information on this feature.

The DACs utilize a segmented current source architecture combined with a proprietary switching technique to reduce glitch energy and maximize dynamic accuracy. Each DAC provides differential current output, thus supporting single-ended or differential applications. Both DACs of the AD9763 can be simultaneously updated and can provide a nominal full-scale current of 20 mA. The full-scale currents between each DAC are matched to within 0.1%.

The AD9763 are manufactured on an advanced, low cost CMOS process. They operate from a single supply of 3.3 V to 5 V and consume 380 mW of power.

AD9763ASTZ Tags

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