IC DAC 16BIT MONO 28CLCC
| Part Number | AD569SE/883B |
| Date Code | 2340 |
| Quantity Available | 23283 pcs |
| Manufacturer | Analog Devices Inc. |
| Lead Time | Ship within 24 hours |
| QTY | 500 |
| Datasheet | AD569.pdf |
| Minimum Quantity | More than 50pcs |
| Distributor | SingSun |
| RoHS Status | Lead free / RoHS Compliant |
| Ship From | Hong Kong |
| Shipment Way | EMS/SF/DHL/TNT/UPS/FedEx |
| Country of Assembly | CHINA |
| Country of Diffusion | KOREA |
| Lot Number | AG31864.76 |
| MSL | 1 |
| Packaging | - |
| Base Product Number | AD569 |
| Series | * |
| Number of Bits | - |
| Number of D/A Converters | - |
| Settling Time | - |
| Output Type | - |
| Differential Output | - |
| Data Interface | - |
| Reference Type | - |
| Voltage - Supply, Analog | - |
| Voltage - Supply, Digital | - |
| INL/DNL (LSB) | - |
| Architecture | - |
| Operating Temperature | - |
| Package / Case | - |
| Supplier Device Package | - |
| Mounting Type | - |
The AD569 is a monolithic 16-bit digital-to-analog converter (DAC) manufactured in Analog Devices' BiMOS II process. BiMOS II allows the fabrication of low power CMOS logic functions on the same chip as high precision bipolar linear circuitry. The AD569 chip includes two resistor strings, selector switches decoding logic, buffer amplifiers, and double-buffered input latches.
The AD569's voltage-segmented architecture insures 16-bit monotonicity over time and temperature. Integral nonlinearity is maintained at ±0.01%, while differential nonlinearity is ±0.0004%. The on-chip, high-speed buffer amplifiers provide a voltage output settling time of 3 µs to within ±0.001% for a full-scale step.
The reference input voltage which determines the output range can be either unipolar or bipolar. Nominal reference range is ±5 V and separate reference force and sense connections are provided for high accuracy applications. The AD569 can operate with an ac reference in multiplying applications.
Data may be loaded into the AD569's input latches from 8- and 16-bit buses. The double-buffered structure simplifies 8-bit bus interfacing and allows multiple DACs to be loaded asynchronously and updated simultaneously. Four TTL/LSTTL/5 V CMOS-compatible signals control the latches: CS, LBE, HBE, and LDAC.
The AD569 is available in five grades: J and K versions are specified from 0°C to +70°C and are packaged in a 28-pin plastic DIP and 28-pin PLCC package; AD and BD versions are specified from −25°C to +85°C and are packaged in a 28-pin ceramic DIP. The SD version, also in a 28-pin ceramic DIP, is specified from −55°C to +125°C.
